Assembly listing generated by yaYUL

Source Code

These source-code files are part of a reconstructed copy of Corona 261, the final, flown release of the Block I Command Module (CM) Apollo Guidance Computer (AGC) software for the AS-202 mission.

They have been created via disassembly of binary dumps of the original core rope memory modules actually flown on the mission, part numbers 1003733-171, 1003733-241, 1003733-191, 1003733-211, 1003733-221, and 1003733-241. The source code for the Apollo 4 and 6 software, Solarium 55, was used as a starting point, since it was directly derived from Corona and (at least in theory) only minimally modified.

Since only binary dumps (rather than listings) of Corona are available as source material, all comments and labels are approximate. They have been taken from other AGC programs where possible, or, in some places, written from scratch to match what we believe would have been in the original listing.

030359,000002: 030360,000003: 030361,000004: 030362,000005: 030363,000006: 030364,000007: 030365,000008: 030366,000009: 030367,000010: 030368,000011: 030369,000012: 030370,000013: 030371,000014: 030372,000015: 030373,000016: 030374,000017: 030375,000018: 13,7155 < < < 030508,000151: 13,7305 030509,000152: 13,7306 030510,000153: 13,7307 030511,000154: < 030513,000156: 13,7311 030514,000157: < < ## Copyright: Public domain. ## Filename: VERIFICATION_ASSISTANCE_PROGRAMS.agc ## Purpose: A section of Corona revision 261. ## It is part of the source code for the Apollo Guidance Computer ## (AGC) for AS-202. No original listings of this software are ## available; instead, this file was created via disassembly of ## the core rope modules actually flown on the mission. ## Assembler: yaYUL ## Contact: Ron Burkey <info@sandroid.org>. ## Website: www.ibiblio.org/apollo/index.html ## Mod history: 2023-05-27 MAS Created from Solarium 55. # WAITLIST EXERCISE PROGRAM. TIMES ARE GIVEN IN THE FORM NN + NN/32 + YY, WHERE THE NS REFER TO TIME # SINCE THE BEGINNING OF THE TEST, AND YS ADDITIONAL MCT. BANK 13 >030376,000019: 13,7155 30006 WLTEST XCH IN2 10006 CCS IN2 # GET IN PHASE WITH T3 INCREMENTS. 07161 TC +2 07156 TC -2 10006 CCS IN2 07161 TC -1 50042 TS OUTCR1 # TO INITIALIZE. # THE FIRST TASK IS ENTERED INTO SLOT 1 WITH A T3 INCREMENT BETWEEN THE TWO T3 REFERENCES. CALL AT # 10 +00/32 -25. SPECIFY WAIT TO 30/32. 07260 TC OUTCR1WT 00035 DEC 29 B-14 07260 TC OUTCR1WT # GO WAIT FOR THIS AND SPECIFY RESET TO 00052 DEC 42 B-14 # 20 +8/32. # AT 30/32 +16, WAIT 12 MCT BEFORE ENTERING TASK 1. 35501 CAF ZERO # TUNING CONSTANT. 10000 CCS A 07171 TC -1 34516 CAF ONE # TASK ENTRY WITH T3 INC BETWEEN TWO T3 02173 TC WAITLIST # REFERENCES. 42240 CADR NOPLWAIT +2 # TASK IN HIGH SWITCHED BANK. 07260 TC OUTCR1WT # WAIT FOR 20 +8/32. CALL FOR RESET TO 00027 DEC 23 B-14 # 20 +31/32. 34516 CAF ONE # AT 20 +8/32 + 16, ENTER TASK 2 DUE AT 02173 TC WAITLIST # 30. 27302 CADR QTSK2 # WAIT FOR 20 +31/32 +16 AND AT THAT TIME WAIT FOR T3 TO OVERFLOW BEFORE ENTERING TASK 3. REQUIRES RESET # TO 30 +10/32. 07260 TC OUTCR1WT 00013 DEC 11 B-14 10037 CCS TIME3 07205 TC -1 34516 CAF ONE # ENTER TASK 3 AFTER T3 OVF. 02173 TC WAITLIST 27303 CADR QTSK3 07260 TC OUTCR1WT # TASK 3 IS DUE AT 40. WAIT FOR 30 +10/32 00065 DEC 53 B-14 # CALLING FOR RESET TO 40 +31/32. # AT 30 +10/32 +16, ENTER TASKS 4 AND 5 DUE SAME RUPT AT 50. THEY WILL BE INHIBITED FOR 6 MS SO THAT T3 # WILL TICK WHILE IT IS BEING RESET IN THE DISPATCH OF 5. 35503 CAF TWO # ENTERED INTO SLOTS 2 AND 3. 02173 TC WAITLIST 27304 CADR QTSK4 35503 CAF TWO 02173 TC WAITLIST 03233 CADR TCTSKOVR # TASK IN FIXED-FIXED. 07260 TC OUTCR1WT # WAIT FOR 40 +31/32 +16, CALLING FOR 00023 DEC 19 B-14 # RESET TO 50 +18/32. 07261 TC OUTCR1WT +1 # AT 40 +31/32 +16, INHIBIT UNTIL 00030 DEC 24 B-14 # 50 +18/32 +16 AND RESET TO 60 +10/32. 07260 TC OUTCR1WT # AT 50 +18/32 +16, WAIT UNTIL 60 10/32, 00025 DEC 21 B-14 # RESETTING TO 60 +31/32. # AT 60 +10/32 +16, ENTER TASKS 6 AND 7 DUE AT 70 AND 8 DUE AT 80. T3 WILL INCREMENT DURING TASK 7 # DISPATCH, MAKING TASK 8 DUE THAT INTERRUPT. 34516 CAF ONE 02173 TC WAITLIST # ENTER TWO TASKS DUE SAME T3 RUPT AND 27310 CADR QTSK6 # ANOTHER DUE THE FOLLOWING RUPT. 34516 CAF ONE 02173 TC WAITLIST 27312 CADR QTSK7 35503 CAF TWO # A T3 INC WILL OCCUR WHILE TASK 7 IS 02173 TC WAITLIST # SETTING T3 FOR THIS TASK AND CAUSE IT TO 27313 CADR QTSK8 # BE THE THIRD TASK DUE THAT RUPT. 07260 TC OUTCR1WT # WAIT UNTIL 60 +31/32 +16, INHINTING 00023 DEC 19 B-14 # 70 +18/32 +16. 07261 TC OUTCR1WT +1 00001 DEC 1 B-14 34477 CAF FIVE # SYSTEMMATICALLY ENTER TASKS IN ALL 6 50115 TS MPAC # SLOTS. F50">030466,000109: 13,7247 20016 QTSKLOOP RELINT 20017 INHINT 40115 CS MPAC 65362 AD SEVEN 02173 TC WAITLIST 27314 CADR QTSK10 10115 CCS MPAC 07246 TC QTSKLOOP -1 354">030475,000118: 13,7257 07257 QENDTEST TC -0 # THE FOLLOWING SUBROUTINE USES OUTCR1 AS A FINE TIMER DURING THE WAITLIST TEST. 754">030480,000123: 13,7260 20016 OUTCR1WT RELINT 30001 XCH Q 50115 TS MPAC 20000 INDEX A 40000 CS 0 # NUMBER OF THIRTY-SECONDS OF 10MS TO WAIT 64522 AD HALF 64522 AD HALF 50116 TS MPAC +1 # NEW OUTCR SETTING. 10042 CCS OUTCR1 07270 TC -1 732">030492,000135: 13,7272 30116 OUTCR1W2 XCH MPAC +1 50042 TS OUTCR1 37301 CAF 1WTCODE 50012 TS OUT2 20017 INHINT 20115 INDEX MPAC 00001 TC 1 5">030500,000143: 13,7301 26000 1WTCODE OCT 26000 # TASKS FOR WAITLIST TESTER. /a>030505,000148: 13,7302 02256 QTSK2 TC TASKOVER /a>030506,000149: 13,7303 02256 QTSK3 TC TASKOVER /a>030507,000150: 13,7304 37315 QTSK4 CAF QTSK4DEL # WAIT SO THAT T3 WILL TICK DURING DISPTCH 10000 CCS A 07305 TC -1 02256 TC TASKOVER /a>030512,000155: 13,7310 37316 QTSK6 CAF QTSK6DEL 07305 TC QTSK4 +1 /a>030515,000158: 13,7312 02256 QTSK7 TC TASKOVER /a>030516,000159: 13,7313 02256 QTSK8 TC TASKOVER >030517,000160: 13,7314 02256 QTSK10 TC TASKOVER 54C">030519,000162: 13,7315 00115 QTSK4DEL DEC 77 B-14 # TUNING CONSTANTS. 54C">030520,000163: 13,7316 00116 QTSK6DEL DEC 78 B-14 VERIFICATION_ASSISTANCE_PROGRAMS.agc. Parent file is MAIN.agc